Electronic system manufacturers continue to demand integrated circuits with higher performance and reliability along with a reduced physical size and manufacturing cost. One package that has been developed is the QFN (quad flat non-leaded) package. QFN packages use a leadframe as a package carrier to provide semiconductor packages of reduced size.
The leadframe includes a die pad and a number of leads around the periphery of the die pad. A die is attached to the die pad. The die is electrically connected to the leads using a wire bonding process. The resulting structure is encapsulated with a molding compound while allowing the lower surfaces of the die pad and the leads to be exposed through the encapsulant.
Semiconductors used in high power circuits often require thicker leadframe metal to support high current levels and adequately dissipate heat generated by the circuit. The use of QFN packages in applications requiring high heat and power dissipation typically use leadframes that are substantially thicker than the leadframes that are used in standard QFN packages. The use of thicker leadframes increases the unit cost of the package and introduces certain processing limitations.
For example, existing tooling used to manufacture standard QFN packages typically cannot be used for power QFN packages. Additionally, saw singulation often is the singulation process used to separate power QFN packages because punch singulation adversely affects the integrity of the packages and causes yield and quality problems in manufacturing.
Hence, there is a need for a QFN integrated circuit and package that has a high current and thermal dissipation capability while maintaining high reliability and a low manufacturing cost.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.